1 ps2069d 06/05/06 description pericom semiconductors pi74lpt16373 is a 16-bit transparent latch designed with 3-state outputs and are intended for bus oriented applications. the output enable and latch enable controls are organized to operate as two 8-bit latches or one 16-bit latch. when latch enable (le) is high, the fip-fops appear transparent to the data. the data that meets the set-up time when le is low is latched. when oe is high, the bus output is in the high impedance state. the pi74lpt16373 can be driven from either 3.3v or 5.0v devices allowing this device to be used as a translator in a mixed 3.3/5.0v system. pi74lpt16373 fast cmos 3.3v 16-bit transparent latch features ? compatible with lcx ? and lvt ? families of products ? supports 5v tolerant mixed signal mode operation C input can be 3v or 5v C output can be 3v or connected to 5v bus ? advanced low power cmos operation ? excellent output drive capability: balanced drives (24 ma sink and source) ? pin compatible with industry standard double-density pinouts ? low ground bounce outputs ? hysteresis on all inputs ? industrial operating temperature range: C40c to +85c ? multiple center pins and distributed vcc/gnd pins minimize switching noise ? packaging (pb-free & green available): C 48-pin 240-mil wide thin plastic tssop (a) C 48-pin 300-mil wide plastic ssop (v) block diagram 1 oe 1 le 1 o 0 c d 1 d 0 to 7 other channels 2 oe 2 le 2 o 0 c d 2 d 0 to 7 other channels 06-0210
pi74lpt16373 3.3v 16-b it t ransparent l atch 2 ps2069d 06/05/06 pin confguration pin description pi n name description xoe 3-state output enable inputs (active low) xle latch enable inputs (active high) xdx data inputs xox 3-state outputs gnd ground v cc power truth table inputs (1) outputs (1) xdx xle xoe xox h h l h l h l l x x h z notes: 1. h = high voltage level, x = don't care, l = low voltage level, z = high impedance 1 oe 1 1 o 0 2 1 o 1 3 gnd 4 1 o 2 5 1 o 3 6 v cc 7 1 o 4 8 1 o 5 9 gnd 10 1 o 6 11 1 o 7 12 2 o 0 13 2 o 1 14 gnd 15 2 o 2 16 2 o 3 17 v cc 18 2 o 4 19 2 o 5 20 gnd 21 2 o 6 22 2 o 7 23 2 oe 24 1 le 48 1 d 0 47 1 d 1 46 gnd 45 1 d 2 44 1 d 3 43 v cc 42 1 d 4 41 1 d 5 40 gnd 39 1 d 6 38 1 d 7 37 2 d 0 36 2 d 1 35 gnd 34 2 d 2 33 2 d 3 32 v cc 31 2 d 4 30 2 d 5 29 gnd 28 2 d 6 27 2 d 7 26 2 le 25 maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other con - ditions above those indicated in the operational sections of this specifcation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. storage temperature ............................................................. C55c to +125c ambient temperature with power applied ............................ C40c to +85c supply voltage to ground potential (inputs & v cc only) ...... C0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) ... C0.5v to +7.0v dc input voltage ............................................................... ...... C0.5v to +7.0v dc output current ............................................................... ................ 120 ma power dissipation ............................................................... ..................... 1.0w 06-0210
pi74lpt16373 3.3v 16-b it t ransparent l atch 3 ps2069d 06/05/06 dc electrical characteristics (over the operating range, t a = C40c to +85c, v cc = 2.7v to 3.6v) parameters description test conditions (1) min. typ (2) max. units v ih input high voltage (input pins) guaranteed logic high level 2.2 5.5 v input high voltage (i/o pins) 2.0 5.5 v il input low voltage (input and i/o pins) guaranteed logic low level C0.5 0.8 i ih input high current (input pins) v cc = max. v in = 5.5v 1 a input high current (i/o pins) v cc = max. v in = v cc 1 i il input low current (input pins) v cc = max. v in = gnd 1 input low current (i/o pins) v cc = max. v in = gnd 1 i ozh high impedance output current v cc = max. v out = 5.5v 1 i ozl ( 3-state output pins) v cc = max. v out = gnd 1 v ik clamp diode voltage v cc = min., i in = C18 ma C0.7 C1.2 v i odh output high current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) C36 C60 C110 ma i odl output low current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) 50 90 200 v oh output high voltage v cc = min. v in = v ih or v il i ol = C0.1 ma v cc -0.2 v i ol = C3 ma 2.4 3.0 v cc = 3.0v, v in = v ih or v il i ol = C8 ma 2.4 (5) 3.0 i ol = C24 ma 2.0 v ol output low voltage v cc = min. i ol = 0.1 ma 0.2 v in = v ih or v il i ol = 16 ma 0.2 0.4 i ol = 24 ma 0.3 0.5 i os short circuit current (4) v cc = max. (3) , v out = gnd C60 C85 C240 ma i off power down disable v cc = 0v, v in or v out 4.5v 100 a v h input hysteresis 150 mv notes: 1. for max. or min. conditions, use appropriate value specifed under electrical characteristics for the applicable device type. 2. typical values are at v cc = 3.3v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is guaranteed but not tested. 5. v oh = v cc C 0.6v at rated current. capacitance ( t a = 25c, f = 1 mhz) parameters (1) description test conditions typ max. units c in input capacitance v in = 0v 4.5 6 pf c out output capacitance v out = 0v 5.5 8 notes: 1. this parameter is determined by device characterization but is not production tested. 06-0210
pi74lpt16373 3.3v 16-b it t ransparent l atch 4 ps2069d 06/05/06 power supply characteristics parameters description test conditions (1) min. typ (2) max. units cc quiescent power supply current v cc = max. v in = gnd or v cc 0.1 10 a ? quiescent power supply current ttl inputs high v cc = max. v in = v cc C 0.6v (3) 500 i ccd dynamic power supply (4) v cc = max., outputs open oe = gnd xle = vcc one bit toggling 50% duty cycle v in = v cc v in = gnd 50 75 a/ mhz i c total power supply current (6) v cc = max., outputs open f i = 10 mh 50% duty cycle oe = gnd one bit toggling v in = v cc C 0.6v v in = gnd 0.6 le = v cc 2.3 ma v cc = max., outputs open f i = 2.5 mh 50% duty cycle oe = gnd 16 bits toggling v in = v cc C 0.6v v in = gnd 2.1 le = v cc 4.7 (5) notes: 1. for max. or min. conditions, use appropriate value specifed under electrical characteristics for the applicable device. 2. typical values are at v cc = 3.3v, +25c ambient. 3. per ttl driven input; all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dnamic i c = i cc + i cc d h n t + i ccd ( f cp /2 + f i n i ) i cc = quiescent current (i ccl , i cch and i ccz ) i cc = power supply current for a ttl high input d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz. 06-0210
pi74lpt16373 3.3v 16-b it t ransparent l atch 5 ps2069d 06/05/06 switching characteristics over operating range (1) parameters description conditions lpt16373 lpt16373a lpt16373c units com. com. com. min (2) max min (2) max min (2) max t plh t phl propagation delay xdx to xox c l = 50 p f r l = 500 1.5 7.0 1.5 5.2 1.5 4.2 ns t plh t phl propagation delay xle to xox 2.0 7.0 2.0 6.5 2.0 5.5 t pzh t pzl output enable time xoe to xox 1.5 7.2 1.5 6.5 1.5 5.5 t phz t plz output disable time (3) xoe to xox 1.5 7.2 1.5 5.5 1.5 5.0 t su setup time high or low, xdx to xle 2.0 2.0 2.0 t h hold time high or low, xdx to xle 1.5 1.5 1.5 t w xle pulse width (3) high 6.0 5.0 5.0 t sk( o ) output skew (4) 0.5 0.5 0.5 notes: 1. propagation delays and enable/disable times are with v cc = 3.3v 0.3v, normal range. for v cc = 2.7v, extended range, all propagation delays and enable/disable times should be degraded by 20%. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not production tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. 06-0210
pi74lpt16373 3.3v 16-b it t ransparent l atch 6 ps2069d 06/05/06 packaging mechanical: 48-pin tssop (a) packaging mechanical: 48-pin ssop (v) 0.20 0.51 1.01 0.25 0.381 0.635 .008 .008 .016 0-8? 0.20 0.40 .110 2.79 .010 gauge plane .02 .04 .015 .025 x 45? .025 bsc 0.635 .291 .299 x.xx x.xx denotes dimensions in millimeters 7.39 7.59 .395 .420 10.03 10.67 .620 .630 15.75 16.00 .008 .0135 0.20 0.34 1 48 nom. max .236 .244 .488 .496 .002 .006 seating plane .007 .010 .0197 bsc .004 .008 .319 1 48 12.4 12.6 6.0 6.2 0.50 0.17 0.27 8.1 0.05 0.15 0.09 0.20 x.xx x.xx denotes dimensions in millimeters .018 .030 0.45 0.75 .047 1.20 max bsc 06-0210
pi74lpt16373 3.3v 16-b it t ransparent l atch 7 ps2069d 06/05/06 pericom semiconductor corporation ? 1-800-435-2336 ? www.pericom.com ordering information ordering code package code speed grade description pi74lpt16373a a blank 48-pin 173 mil wide plastic tssop pi74lpt16373aa a a 48-pin 173 mil wide plastic tssop pi74lpt16373av v a 48-pin 300 mil wide plastic ssop pi74lpt16373ave v a pb-free & green, 48-pin 300 mil wide plastic ssop pi74lpt16373ca a c 48-pin 173 mil wide plastic tssop pi74lpt16373cv v c 48-pin 300 mil wide plastic ssop PI74LPT16373CVE v c pb-free & green, 48-pin 300 mil wide plastic ssop notes: ? thermal characteristics can be found on the company web site at www .pericom.com/packaging/ ? e = pb-free & green ? adding an x suffx = tape/reel 06-0210
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